#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
3dd14868 |
|
22-Jan-2024 |
Tom Rini <trini@konsulko.com> |
Kconfig: Centralize prompting for SYS_CONFIG_NAME Generally speaking, we do not prompt for this value and define it in the board specific Kconfig file. There are some valid use cases however today where we do prompt for this value, so instead of having this be done in a number of locations, do this at the top-level location only. This removes the question from a number of other locations and makes it consistent that when we do set the value directly, we always do it the same way. We don't need to specify the type, it's always string. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
9df16c59 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: add support for handling PVR data Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
064057fd |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: Kconfig: introduce XILINX_MICROBLAZE0_FPGA_FAMILY option Provide a static Kconfig value for the target FPGA archtitecture, as it is done in Linux. The cpu-uclass driver will cross-check it with the value read from PVR10 register. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-12-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
84488fc6 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: introduce Kconfig options for icache/dcache sizes Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
|
#
8daf8967 |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve icache Kconfig options Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
ef0a592a |
|
31-May-2022 |
Ovidiu Panait <ovpanait@gmail.com> |
microblaze: cache: improve dcache Kconfig options Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
1669b3d1 |
|
13-Feb-2022 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: exception: migrate MICROBLAZE_V5 to Kconfig Also, rename it to XILINX_MICROBLAZE0_DELAY_SLOT_EXCEP, since it only covers delay slot exception support. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20220213080925.1548411-2-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
b6aef109 |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: add Kconfig symbol for the vector base address MicroBlaze vector base address is configurable (hdl C_BASE_VECTORS configuration parameter). Current code assumes that the reset vector location is always 0x0. Add the XILINX_MICROBLAZE0_VECTOR_BASE_ADDR Kconfig option so the user can adjust the reset vector address. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-8-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
83b175be |
|
30-Nov-2021 |
Ovidiu Panait <ovidiu.panait@windriver.com> |
microblaze: migrate CONFIG_SYS_USR_EXCEP to Kconfig Migrate CONFIG_SYS_USR_EXCEP to Kconfig. Also, rename it to XILINX_MICROBLAZE0_USR_EXCEP in order to match the naming convention of microblaze-generic Kconfig options. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Link: https://lore.kernel.org/r/20211130163358.2531677-7-ovidiu.panait@windriver.com Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
92dc9210 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Merge together BOOT_SCRIPT_OFFSET between MB and ARM There is no reason not to use commong Kconfig by Microblaze too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ed0842d6 |
|
22-Sep-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
microblaze: Setup distro boot env variables at run time Setup all the distro boot related environment variables at run time. Add BOOT_SCRIPT_OFFSET config to microblaze board Kconfig. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
8a32077e |
|
23-Jul-2018 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Add missing quotes around XILINX_MICROBLAZE0_HW_VER This issue is reported by kconfiglib: warning: style: quotes recommended around default value for string symbol XILINX_MICROBLAZE0_HW_VER (defined at board/xilinx/microblaze-generic/Kconfig:37) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
36458cef |
|
16-Aug-2016 |
Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> |
microblaze: Make the board configuration name user definable Add a prompt for editing in menuconfig Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
ac551e34 |
|
24-May-2016 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Move MSR instruction selection to Kconfig Select MSR instructions via Kconfig instead of xparameters.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
4ad1096e |
|
24-May-2016 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Add option to pass cpu version number Toolchain can use some flags by default based on cpu version. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
91eeb80e |
|
24-May-2016 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Select compilation flags via Kconfig Remove autogenerated config.mk and select CPU options via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
|
#
461be2f9 |
|
13-Sep-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
kconfig: remove redundant "string" type in arch and board Kconfigs Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
#
dd84058d |
|
29-Jul-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
kconfig: add board Kconfig and defconfig files This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
|