#
d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
5ef71012 |
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30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
board: xilinx: Remove <common.h> and add needed includes Remove <common.h> from this board vendor directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f03f962c |
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04-Apr-2024 |
Petr Zejdl <petr.zejdl@cern.ch> |
xilinx: common: Fix MAC address read from EEPROM The upper-to-lowercase character conversion now avoids altering the MAC address field. In the previous version, this alteration corrupted the MAC address. Signed-off-by: Petr Zejdl <petr.zejdl@cern.ch> Link: https://lore.kernel.org/r/20240404114422.2905194-1-petr.zejdl@cern.ch Signed-off-by: Michal Simek <michal.simek@amd.com> |
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6c4a7398 |
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31-Mar-2024 |
James Hilliard <james.hilliard1@gmail.com> |
xilinx: zynq: add FDT_FIXUP_PARTITIONS support There are situations where we may want to let U-Boot modify the FDT nand partitions for the kernel, such as when supporting multiple sizes of NAND chips. Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Link: https://lore.kernel.org/r/20240331232859.727769-1-james.hilliard1@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
3d3cb285 |
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23-Feb-2024 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Do not describe u-boot.itb if SPL is disabled There is no reason to describe u-boot.itb on system without SPL. Pretty much this is cover all systems which are using only boot.bin which contains all images inside. Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/561f9d0ee96ebb6cd674042f269f280ab68fbbac.1708705118.git.michal.simek@amd.com |
#
451b2ea2 |
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13-Feb-2024 |
Michal Simek <michal.simek@amd.com> |
riscv: mbv: Enable SPL and binman Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb (supervisor mode). DTB is placed at fixed address to ensure that it is 8 byte aligned which is not ensured when dtb is attached behind SPL binary that's why SPL and U-Boot are taking DTB from the same address. Also align addresses for both defconfigs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com |
#
a270099e |
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16-Jan-2024 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: board: Update the kaslr-seed property Create a ft_board_setup() api that gets called as part of bootm/booti before jumping to kernel. In this ft_board_setup() callback that will inspect the DTB and insert the device tree blob with the "kaslr-seed" property. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240117032014.1014084-2-venkatesh.abbarapu@amd.com |
#
7576ab2f |
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05-Nov-2023 |
Michal Simek <michal.simek@amd.com> |
riscv: Add support for AMD/Xilinx MicroBlaze V MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> |
#
0bbc962e |
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31-Aug-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support to pick bootscr flash offset/size from DT Location of bootscript in flash can be specified via /options/u-boot DT node by using bootscr-flash-offset and bootscr-flash-size properties. Values should be saved to script_offset_f and script_size_f variables. Variables are described in doc/develop/bootstd.rst as: script_offset_f SPI flash offset from which to load the U-Boot script, e.g. 0xffe000 script_size_f Size of the script to load, e.g. 0x2000 Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c to identify bootscript location inside flash. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com |
#
5528f797 |
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31-Aug-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: board: Add support to pick bootscr address from DT The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com |
#
7e6e40c5 |
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21-Aug-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'v2023.10-rc3' into next Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
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#
d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
ccea96f4 |
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02-Aug-2023 |
Shiji Yang <yangshiji66@outlook.com> |
treewide: unify the linker symbol reference format Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cccea188 |
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06-Jun-2023 |
Masahisa Kojima <kojima.masahisa@socionext.com> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
#
eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
#
b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
5ef71012 |
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30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
board: xilinx: Remove <common.h> and add needed includes Remove <common.h> from this board vendor directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
f03f962c |
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04-Apr-2024 |
Petr Zejdl <petr.zejdl@cern.ch> |
xilinx: common: Fix MAC address read from EEPROM The upper-to-lowercase character conversion now avoids altering the MAC address field. In the previous version, this alteration corrupted the MAC address. Signed-off-by: Petr Zejdl <petr.zejdl@cern.ch> Link: https://lore.kernel.org/r/20240404114422.2905194-1-petr.zejdl@cern.ch Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
6c4a7398 |
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31-Mar-2024 |
James Hilliard <james.hilliard1@gmail.com> |
xilinx: zynq: add FDT_FIXUP_PARTITIONS support There are situations where we may want to let U-Boot modify the FDT nand partitions for the kernel, such as when supporting multiple sizes of NAND chips. Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Link: https://lore.kernel.org/r/20240331232859.727769-1-james.hilliard1@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
3d3cb285 |
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23-Feb-2024 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Do not describe u-boot.itb if SPL is disabled There is no reason to describe u-boot.itb on system without SPL. Pretty much this is cover all systems which are using only boot.bin which contains all images inside. Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/561f9d0ee96ebb6cd674042f269f280ab68fbbac.1708705118.git.michal.simek@amd.com |
#
451b2ea2 |
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13-Feb-2024 |
Michal Simek <michal.simek@amd.com> |
riscv: mbv: Enable SPL and binman Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb (supervisor mode). DTB is placed at fixed address to ensure that it is 8 byte aligned which is not ensured when dtb is attached behind SPL binary that's why SPL and U-Boot are taking DTB from the same address. Also align addresses for both defconfigs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com |
#
a270099e |
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16-Jan-2024 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: board: Update the kaslr-seed property Create a ft_board_setup() api that gets called as part of bootm/booti before jumping to kernel. In this ft_board_setup() callback that will inspect the DTB and insert the device tree blob with the "kaslr-seed" property. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240117032014.1014084-2-venkatesh.abbarapu@amd.com |
#
7576ab2f |
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05-Nov-2023 |
Michal Simek <michal.simek@amd.com> |
riscv: Add support for AMD/Xilinx MicroBlaze V MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> |
#
0bbc962e |
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31-Aug-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support to pick bootscr flash offset/size from DT Location of bootscript in flash can be specified via /options/u-boot DT node by using bootscr-flash-offset and bootscr-flash-size properties. Values should be saved to script_offset_f and script_size_f variables. Variables are described in doc/develop/bootstd.rst as: script_offset_f SPI flash offset from which to load the U-Boot script, e.g. 0xffe000 script_size_f Size of the script to load, e.g. 0x2000 Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c to identify bootscript location inside flash. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com |
#
5528f797 |
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31-Aug-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: board: Add support to pick bootscr address from DT The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com |
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7e6e40c5 |
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21-Aug-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'v2023.10-rc3' into next Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
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d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
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ccea96f4 |
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02-Aug-2023 |
Shiji Yang <yangshiji66@outlook.com> |
treewide: unify the linker symbol reference format Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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cccea188 |
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06-Jun-2023 |
Masahisa Kojima <kojima.masahisa@socionext.com> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
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eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
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e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
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b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
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fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
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ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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049704f8 |
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09-Sep-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
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a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
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4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
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ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
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86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
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741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
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7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
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ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
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f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f03f962c |
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04-Apr-2024 |
Petr Zejdl <petr.zejdl@cern.ch> |
xilinx: common: Fix MAC address read from EEPROM The upper-to-lowercase character conversion now avoids altering the MAC address field. In the previous version, this alteration corrupted the MAC address. Signed-off-by: Petr Zejdl <petr.zejdl@cern.ch> Link: https://lore.kernel.org/r/20240404114422.2905194-1-petr.zejdl@cern.ch Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
6c4a7398 |
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31-Mar-2024 |
James Hilliard <james.hilliard1@gmail.com> |
xilinx: zynq: add FDT_FIXUP_PARTITIONS support There are situations where we may want to let U-Boot modify the FDT nand partitions for the kernel, such as when supporting multiple sizes of NAND chips. Signed-off-by: James Hilliard <james.hilliard1@gmail.com> Link: https://lore.kernel.org/r/20240331232859.727769-1-james.hilliard1@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
3d3cb285 |
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23-Feb-2024 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Do not describe u-boot.itb if SPL is disabled There is no reason to describe u-boot.itb on system without SPL. Pretty much this is cover all systems which are using only boot.bin which contains all images inside. Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/561f9d0ee96ebb6cd674042f269f280ab68fbbac.1708705118.git.michal.simek@amd.com |
#
451b2ea2 |
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13-Feb-2024 |
Michal Simek <michal.simek@amd.com> |
riscv: mbv: Enable SPL and binman Enable SPL and binman to generate u-boot.img (machine mode) and u-boot.itb (supervisor mode). DTB is placed at fixed address to ensure that it is 8 byte aligned which is not ensured when dtb is attached behind SPL binary that's why SPL and U-Boot are taking DTB from the same address. Also align addresses for both defconfigs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/85506bce5580d448f095f267d029e3932c5e9990.1707911544.git.michal.simek@amd.com |
#
a270099e |
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16-Jan-2024 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: board: Update the kaslr-seed property Create a ft_board_setup() api that gets called as part of bootm/booti before jumping to kernel. In this ft_board_setup() callback that will inspect the DTB and insert the device tree blob with the "kaslr-seed" property. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240117032014.1014084-2-venkatesh.abbarapu@amd.com |
#
7576ab2f |
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05-Nov-2023 |
Michal Simek <michal.simek@amd.com> |
riscv: Add support for AMD/Xilinx MicroBlaze V MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> |
#
0bbc962e |
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31-Aug-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support to pick bootscr flash offset/size from DT Location of bootscript in flash can be specified via /options/u-boot DT node by using bootscr-flash-offset and bootscr-flash-size properties. Values should be saved to script_offset_f and script_size_f variables. Variables are described in doc/develop/bootstd.rst as: script_offset_f SPI flash offset from which to load the U-Boot script, e.g. 0xffe000 script_size_f Size of the script to load, e.g. 0x2000 Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c to identify bootscript location inside flash. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com |
#
5528f797 |
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31-Aug-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: board: Add support to pick bootscr address from DT The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com |
#
7e6e40c5 |
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21-Aug-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'v2023.10-rc3' into next Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
ccea96f4 |
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02-Aug-2023 |
Shiji Yang <yangshiji66@outlook.com> |
treewide: unify the linker symbol reference format Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cccea188 |
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06-Jun-2023 |
Masahisa Kojima <kojima.masahisa@socionext.com> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
#
eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
#
b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a270099e |
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16-Jan-2024 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: board: Update the kaslr-seed property Create a ft_board_setup() api that gets called as part of bootm/booti before jumping to kernel. In this ft_board_setup() callback that will inspect the DTB and insert the device tree blob with the "kaslr-seed" property. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20240117032014.1014084-2-venkatesh.abbarapu@amd.com |
#
7576ab2f |
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05-Nov-2023 |
Michal Simek <michal.simek@amd.com> |
riscv: Add support for AMD/Xilinx MicroBlaze V MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> |
#
0bbc962e |
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31-Aug-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support to pick bootscr flash offset/size from DT Location of bootscript in flash can be specified via /options/u-boot DT node by using bootscr-flash-offset and bootscr-flash-size properties. Values should be saved to script_offset_f and script_size_f variables. Variables are described in doc/develop/bootstd.rst as: script_offset_f SPI flash offset from which to load the U-Boot script, e.g. 0xffe000 script_size_f Size of the script to load, e.g. 0x2000 Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c to identify bootscript location inside flash. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com |
#
5528f797 |
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31-Aug-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: board: Add support to pick bootscr address from DT The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com |
#
7e6e40c5 |
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21-Aug-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'v2023.10-rc3' into next Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
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#
d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
ccea96f4 |
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02-Aug-2023 |
Shiji Yang <yangshiji66@outlook.com> |
treewide: unify the linker symbol reference format Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cccea188 |
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06-Jun-2023 |
Masahisa Kojima <masahisa.kojima@linaro.org> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
#
eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
#
b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
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86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
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741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
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7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
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ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
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f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
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e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
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a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
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fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
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829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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7576ab2f |
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05-Nov-2023 |
Michal Simek <michal.simek@amd.com> |
riscv: Add support for AMD/Xilinx MicroBlaze V MicroBlaze V is new AMD/Xilinx soft-core 32bit RISC-V processor IP. It is hardware compatible with classic MicroBlaze processor. The patch contains initial wiring and configuration for initial HW design with memory, cpu, interrupt controller, timers and uartlite console (interrupt controller is listed but U-Boot is not using it). Provided DT is just describing one configuration and should be taken only as example. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com> |
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0bbc962e |
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31-Aug-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support to pick bootscr flash offset/size from DT Location of bootscript in flash can be specified via /options/u-boot DT node by using bootscr-flash-offset and bootscr-flash-size properties. Values should be saved to script_offset_f and script_size_f variables. Variables are described in doc/develop/bootstd.rst as: script_offset_f SPI flash offset from which to load the U-Boot script, e.g. 0xffe000 script_size_f Size of the script to load, e.g. 0x2000 Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c to identify bootscript location inside flash. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com |
#
5528f797 |
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31-Aug-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: board: Add support to pick bootscr address from DT The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com |
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7e6e40c5 |
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21-Aug-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'v2023.10-rc3' into next Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
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d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
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ccea96f4 |
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02-Aug-2023 |
Shiji Yang <yangshiji66@outlook.com> |
treewide: unify the linker symbol reference format Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
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cccea188 |
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06-Jun-2023 |
Masahisa Kojima <masahisa.kojima@linaro.org> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
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eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
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b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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049704f8 |
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09-Sep-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
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4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
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ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
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86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
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741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
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7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
0bbc962e |
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31-Aug-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support to pick bootscr flash offset/size from DT Location of bootscript in flash can be specified via /options/u-boot DT node by using bootscr-flash-offset and bootscr-flash-size properties. Values should be saved to script_offset_f and script_size_f variables. Variables are described in doc/develop/bootstd.rst as: script_offset_f SPI flash offset from which to load the U-Boot script, e.g. 0xffe000 script_size_f Size of the script to load, e.g. 0x2000 Both of them are used by sf_get_bootflow() in drivers/mtd/spi/sf_bootdev.c to identify bootscript location inside flash. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/60a84405f3fefabb8b48a4e1ce84431483a729f3.1693465465.git.michal.simek@amd.com |
#
5528f797 |
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31-Aug-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: board: Add support to pick bootscr address from DT The bootscript is expected at a default address specific to each platform. When high speed memory like Programmable Logic Double Data Rate RAM (PL DDR RAM) or Higher Bandwidth Memory RAM (HBM) is used the boot.scr may be loaded at a different offset. The offset needs to be set through setenv. Due to the default values in some cases the boot.scr is falling in between the kernel partition. The bootscript address or the bootscript offset is fetched directly from the DT and updated in the environment making it easier for automated flows. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fac7020b31e1f150b021d666f0d588579ea671ad.1693465140.git.michal.simek@amd.com |
#
7e6e40c5 |
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21-Aug-2023 |
Tom Rini <trini@konsulko.com> |
Merge tag 'v2023.10-rc3' into next Prepare v2023.10-rc3 Signed-off-by: Tom Rini <trini@konsulko.com>
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#
d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
ccea96f4 |
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02-Aug-2023 |
Shiji Yang <yangshiji66@outlook.com> |
treewide: unify the linker symbol reference format Now all linker symbols are declared as type char[]. Though we can reference the address via both the array name 'var' and its address '&var'. It's better to unify them to avoid confusing developers. This patch converts all '&var' linker symbol refrences to the most commonly used format 'var'. Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cccea188 |
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06-Jun-2023 |
Masahisa Kojima <masahisa.kojima@linaro.org> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
#
eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
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e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
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b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
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4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
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741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
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ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d768dd88 |
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12-Aug-2023 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
common: return type board_get_usable_ram_top board_get_usable_ram_top() returns a physical address that is stored in gd->ram_top. The return type of the function should be phys_addr_t like the current type of gd->ram_top. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> |
#
cccea188 |
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06-Jun-2023 |
Masahisa Kojima <masahisa.kojima@linaro.org> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
#
eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
#
b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cccea188 |
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06-Jun-2023 |
Masahisa Kojima <masahisa.kojima@linaro.org> |
efi_loader: add the number of image entries in efi_capsule_update_info The number of image array entries global variable is required to support EFI capsule update. This information is exposed as a num_image_type_guids variable, but this information should be included in the efi_capsule_update_info structure. This commit adds the num_images member in the efi_capsule_update_info structure. All board files supporting EFI capsule update are updated. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> |
#
eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
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c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
#
b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@amd.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
eca09868 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of REGEX This converts 1 usage of this option to the non-SPL form, since there is no SPL_REGEX defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
0c22cdca |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of MICROBLAZE This converts 2 usages of this option to the non-SPL form, since there is no SPL_MICROBLAZE defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
71aa806d |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of EFI_HAVE_CAPSULE_SUPPORT This converts 13 usages of this option to the non-SPL form, since there is no SPL_EFI_HAVE_CAPSULE_SUPPORT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
866ec874 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL uses of DTB_RESELECT This converts 2 usages of this option to the non-SPL form, since there is no SPL_DTB_RESELECT defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f8daba44 |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of CMD_FRU This converts 1 usage of this option to the non-SPL form, since there is no SPL_CMD_FRU defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
c0ef5a3e |
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05-Feb-2023 |
Simon Glass <sjg@chromium.org> |
Correct SPL use of ARCH_ZYNQ This converts 1 usage of this option to the non-SPL form, since there is no SPL_ARCH_ZYNQ defined in Kconfig Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
#
b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
5563167e |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Update logic in xilinx_read_eeprom_legacy When eeprom has random content printing random chars can stuck U-Boot. That's why update legacy eeprom format decoding algorithm to copy only maximum amount of chars allocated for fields. And also print them directly from desc structure. Previous algorithm was printing strings first directly from eeprom content and then copy them to desc structure. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/42065fcbb1a10581f9f4f091d64b43c01fe595c6.1674573561.git.michal.simek@amd.com |
#
e6c62537 |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Fix xilinx_eeprom_legacy_cleanup() When ethernet mac address contains 0x20 or 0xff MAC address is changed and bytes are converted to zeros. That's why fix decoding algorithm to ignore fields where MAC address is stored and all non printable chars (including space) are zeroed. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2802cf1086b14c181356810006fe886f950a36f3.1674573561.git.michal.simek@amd.com |
#
b86b135f |
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24-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Use ETH_ALEN macro for mac address size Use predefined macro for eth_mac legacy format. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/382d4bff370894164fad3c30ac0400b25142b544.1674573561.git.michal.simek@amd.com |
#
fb737f1e |
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19-Jan-2023 |
Algapally Santosh Sagar <santoshsagar.algapally@amd.com> |
xilinx: common: Include header file to fix warning Prototype is missing for board_get_usable_ram_top, which is pointed by below sparse warning. Include init.h header file to fix this. warning: no previous prototype for 'board_get_usable_ram_top' [-Wmissing-prototypes]. Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> Link: https://lore.kernel.org/r/20230120053617.32463-2-ashok.reddy.soma@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
8174cd21 |
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06-Jan-2023 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for partial string match in board_fit_config_name_match() Board name in FIT image can use U-Boot regular expressions SLRE to instruct U-Boot to handle all revisions for certain board. For example when name (description property) is saying "zynqmp-zcu104-revA" only description with this name is selected. When zynqmp-zcu104.* is described then all board revisions will be handled by this fragment. Xilinx normally have some board revisions which are SW compatible to each other. That's why make sense to define board name with revisions first follow by generic description with '.*' at the end like this: config_1 { description = "zynqmp-zcu104-rev[AB]"; fdt = "zynqmp-zcu104-revA"; }; config_2 { description = "zynqmp-zcu104.*"; fdt = "zynqmp-zcu104-revC"; }; Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d67683a3c5d0435a5070e622f7a9a38e19c64cf5.1672994329.git.michal.simek@amd.com |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ba74bcf3 |
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17-Oct-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Remove zynq_board_read_rom_ethaddr() Removing the zynq_board_read_rom_ethaddr() function as xlnx,eeprom is not used anymore. As all board dts to use nvmem alias instead of xlnx,eeprom. Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20221017094818.17996-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
872a9b81 |
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08-Oct-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
xilinx: common: fix board_late_init_xilinx() Compiling with GCC-12 leads to an error: +board/xilinx/common/board.c:479:37: error: the comparison will always evaluate as 'true' for the address of 'mac_addr' will never be NULL [-Werror=address] + 479 | if (!desc->mac_addr[i]) + | ^ Remove the redundant check. Fixes: a03b594738f8 ("xilinx: board: Add support for additional card detection") Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Link: https://lore.kernel.org/r/20221008091317.52838-1-heinrich.schuchardt@canonical.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
e1a193b9 |
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25-Sep-2022 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> |
xilinx: common: Fix static checker warnings Avoid signed extension for uuid and byte. Eliminate the below smatch warnings: board/xilinx/common/board.c:128 xilinx_eeprom_legacy_cleanup() warn: impossible condition '(byte == 255) => ((-128)-127 == 255)' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 3 to %02x specifier has type 'char' board/xilinx/common/board.c:466 board_late_init_xilinx() warn: argument 4 to %02x specifier has type 'char' Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20220926065242.4355-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
049704f8 |
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09-Sep-2022 |
Pali Rohár <pali@kernel.org> |
board_f: Fix types for board_get_usable_ram_top() Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") changed type of ram_top member from ulong to phys_addr_t but did not changed types in board_get_usable_ram_top() function which returns value for ram_top. So change ulong to phys_addr_t type also in board_get_usable_ram_top() signature and implementations. Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t") Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
39d3c3cf |
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05-Sep-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for SOC detection Code supports board detection based on information available in EEPROM in legacy or FRU format. But this is not enough for emulation and simulation systems which are lacking these identification EEPROMs. But SOC itself has normally registers for SOC identification. Based on them it is possible to compose detected name. That's why prepare infrastructure in common location for SOC platform detection which is called before board platform detection. SOC platform detection shouldn't detect real silicon and should fallback to current existing mechanism to identify boards based on EEPROMs. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/329a8da338927b082e26a958bf69bb18af072420.1662460837.git.michal.simek@amd.com |
#
a32c3e9e |
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25-Aug-2022 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Move board_get_usable_ram_top() to common location The commit ce39ee28ec31 ("zynqmp: Do not place u-boot to reserved memory location") adds functionality for ZynqMP to read reserved memory node and do not place U-Boot to reserved location. This functionality is generic across all Xilinx SOCs that's why move it to common location to be used by all Xilinx SOCs. On zynq platform this is also fixing issue where U-Boot was placed to locating which was reserved already which ends up with error message "ERROR: reserving fdt memory region failed (addr=30000000 size=10000000 flags=4)" which is shown when bdinfo is called. Tested on vck190, zcu102, zc706 and kc705 to cover all platforms. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/b0817807912f7c7af6a8e1cf9ee04e5ab5de5f6a.1661430188.git.michal.simek@amd.com |
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4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
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86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
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93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
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741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
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7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
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ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
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f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
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e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
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52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
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a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
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fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
4a1bfcd7 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Use strlcpy instead of strncpy It is recommendation done by checkpatch to all the time have \0 terminated strings. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c7bfab50c40f6213f1b347b5e4674e382e83cb94.1658413156.git.michal.simek@amd.com |
#
ee5a4b87 |
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21-Jul-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Wire uuid reading from FRU UUID is already recorded when FRU is parsed but it is not copied to local structures and exported to variable that's why simply add it. Data is saved in binary format but there must be conversion to string for exporting it to variable and string should be in uuid format too. One way how to use it directly is to setup pxeuuid based on it. For example via preboot with "setenv pxeuuid ${board_uuid}" Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1dfa4b4220a508abc05351da2119880811b77612.1658413156.git.michal.simek@amd.com |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
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#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
86ceedd8 |
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20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: common: Separate display cpu info function Move the print_cpuinfo function of CONFIG_DISPLAY_CPUINFO into its own source file to support reuse by other board vendors. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-10-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
381ede9e |
|
20-Jun-2022 |
Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> |
xilinx: cpuinfo: Print soc machine Print the soc machine in the print_cpuinfo function. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com> Link: https://lore.kernel.org/r/20220620163650.18756-9-stefan.herbrechtsmeier-oss@weidmueller.com Signed-off-by: Michal Simek <michal.simek@amd.com> |
#
93216276 |
|
06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
|
17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
93216276 |
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06-Jun-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected revision Also fix board revision field where spaces are used instead of \0. The same change was done for board name by commit 530560b6f8eb ("xilinx: fru: Replace spaces with \0 in detected name"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e069e5134e57899e859786ad8ba48721df6df752.1653911444.git.michal.simek@amd.com |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@amd.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
|
02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
|
02-Aug-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@amd.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@amd.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@amd.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
741ef867 |
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14-Apr-2022 |
Sughosh Ganu <sughosh.ganu@linaro.org> |
capsule: board: Add information needed for capsule updates Add a structure which defines the information that is needed for executing capsule updates on a platform. Some information in the structure like the dfu string is used for making the update process more robust while some information like the per platform image GUIDs is used for fixing issues. Initialise this structure in the board file, and use the information for the capsule updates. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7a036b67 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
fru: ops: Add support to read mac addresses from multirecord Add support to read MAC addresses from mac address multirecord. Check if multi record is found, then jump to mac address multirecord by comparing the record type field. If it matches mac address multirecord(0xD2), then copy mac addresses. Copy these read MAC address in xilinx_read_eeprom_fru so that they are updated to eth*addr in board_late_init_xilinx(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/18f31bc528820934854ea5fd9dc581778fc1e40c.1645624855.git.michal.simek@xilinx.com |
#
ff8ee707 |
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23-Feb-2022 |
Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> |
xilinx: common: Optimise updating ethaddr from eeprom In board_late_init_xilinx() eth*addr are updated from the values read from eeprom. Ideally the MAC addresses are updated sequencially. So if any MAC address is invalid, it means there are no further valid values. So optimise this logic by replacing continue with break. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/efef0d07add5d5777396ea111ad75411dc402db3.1645624855.git.michal.simek@xilinx.com |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f0631005 |
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17-Feb-2022 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Enable OF_BOARD for zynq and zynqmp boards The commit 985503439762 ("fdt: Don't call board_fdt_blob_setup() without OF_BOARD") forced to enable OF_BOARD for platforms which provide DT externally. Zynq/ZynqMP boards are using this feature for a long time that's why there is a need to enable it by default. Also code expects to return error in case of error that's why also fill it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/9f11bbffe2849f4da7d72712082d579262fe8fd8.1645104518.git.michal.simek@xilinx.com |
#
e6e3b9d7 |
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20-Jan-2022 |
Ricardo Salveti <ricardo@foundries.io> |
xilinx: common: change bootm_size to not go beyond ram_top The available ram can be limited by ram_top as that depends on the reserved memory nodes provided by the device-tree (via board_get_usable_ram_top), so make sure to respect ram_top when setting up bootm_size to avoid overlapping reserved memory regions (e.g. memory used by OP-TEE). The same logic is available in env_get_bootm_size when bootm_size is not defined by the default environment. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Link: https://lore.kernel.org/r/20220120191730.2009270-1-ricardo@foundries.io Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e7fb7896 |
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26-Oct-2021 |
Ilias Apalodimas <ilias.apalodimas@linaro.org> |
sandbox: Remove OF_HOSTFILE OF_HOSTFILE is used on sandbox configs only. Although it's pretty unique and not causing any confusions, we are better of having simpler config options for the DTB. So let's replace that with the existing OF_BOARD. U-Boot would then have only three config options for the DTB origin. - OF_SEPARATE, build separately from U-Boot - OF_BOARD, board specific way of providing the DTB - OF_EMBED embedded in the u-boot binary(should not be used in production Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
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02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
52ff1626 |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Enabling generic function for DT reselection U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
88232532 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Add support for generic board detection Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
b262863b |
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13-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Free allocated structure There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d9c93c9e |
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11-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change board_info[] handling Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
57f71032 |
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23-Jul-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Use variable for passing board_name Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
530560b6 |
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12-Aug-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: fru: Replace spaces with \0 in detected name FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80c0d38a |
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10-Aug-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Add function to print SoC info Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
|
02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
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02-Feb-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
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04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
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25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
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01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
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22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
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03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
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04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
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11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
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02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
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09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
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08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
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30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
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19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
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27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
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19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
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02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
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22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
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21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
25484d90 |
|
02-Apr-2021 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: common: Fix boot script address Currently u-boot supports addresses upto 39-bits only. If anybody wants to use addresses of more than 39-bits in Linux they will have a separate memory node in DT. In such cases they will have multiple memory nodes. Currently u-boot selects and runs on lower memory bank region. But bootscript is being loaded on dram bank 0, where dram bank 0 will point to 1st memory node in DT. If first memory node is mentioned as higher ddr(>39-bits address) then u-boot cannot load the bootscript. So fix this issue by setting bootscript address within the lower memory bank region. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
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23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
|
02-Feb-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
|
25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
|
01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
|
04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
cbe607b9 |
|
23-Feb-2021 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name
|
#
fc3c6fd7 |
|
02-Feb-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Fix CONFIG_XILINX_OF_BOARD_DTB_ADDR handling for ZynqMP Fix bug introduced by commit listed below. It is for cases where Versal or ZynqMP don't have DDR mapped. Later SPL was also excluded by commit a672b9871b57 ("xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL"). Fixes: 506009fc1022 ("xilinx: common: Change macro handling in board_fdt_blob_setup()") Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
|
25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
|
01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
|
04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a672b987 |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
|
25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
|
01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
|
04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a672b987 |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not touch CONFIG_XILINX_OF_BOARD_DTB_ADDR in SPL This hook is used in full U-Boot that's why there is no reason to touch this location from SPL. The hook was introduced for QEMU usage but none is really running SPL on QEMU that's why it shouldn't break any usecase. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
506009fc |
|
04-Jan-2021 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change macro handling in board_fdt_blob_setup() Remove ifdef logic which is handled by preprocessor and move it link time optimization to get full compile code coverage. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
|
25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
|
01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
|
04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
05af4834 |
|
25-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Consolidate board_fit_config_name_match() for Xilinx platforms Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
12305821 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
microblaze: Wire generic xilinx board_late_init_xilinx() Call generic board_late_init_xilinx() to be aligned with the rest of xilinx platforms. Also getting rid of initrd_high/fdt_high and use bootm_low/boot_size instead. Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d388cedd |
|
01-Apr-2020 |
T Karthik Reddy <t.karthik.reddy@xilinx.com> |
xilinx: Add DDR base address to bootscript address Add ram base address to scriptaddr env variable to make boot script address to be a valid address when ddr base address changes. This works properly if the first memory region is the region where uboot runs. Also the solution was taken in respect of a lot of jtag script putting u-boot script to certain address. For standard cases bd->bi_dram[0].start is 0 all the time. Only for systems with DDR placed out of this location it does calculation. This is not the best solution and should be done differently in future but enough for now till we don't have full solution ready yet. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f149b39c |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add FRU decoder support FMC cards are using FRU format for card identification. That's why add support for this format. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
7c553ac0 |
|
22-Oct-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Protect board_late_init_xilinx() Do not call board_late_init_xilinx() when BOARD_LATE_INIT is not enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a03b5947 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Add support for additional card detection The most of Xilinx evaluation boards have FMC connectors which contain small eeprom for card identification. That's why read content of eeprom and record it. Also generate cardX_ variables for easier script handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
d61728c8 |
|
03-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: board: Read the whole eeprom not just offset Starts to use new way how eeproms should be referenced. Reference is done via nvmem alias nodes. When this new way is specified code itself read the eeprom and decode xilinx legacy format and fill struct xilinx_board_description. Then based on information present there board_* variables are setup. If variables are saved and content can't be changed information is just shown on console. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
e2572b55 |
|
04-Sep-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Do not save fdt_blob to bss section For SPL flow without specifying address for DT loading DTB is automatically appended behind U-Boot code. Specifically _end symbol is used. Just behind it there is place for bss section. It means if early code is using static variable and there is a write to this variable DTB file is corrupted if variable is located between DTB start and end. In this particular case offset of this variable from bss section start is very small (0x40) that's why DT is currupted which breaks this boot flow. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
2570cc64 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Change bootm_size variable setting Linux kernel for arm32 requires dtb and initrd to be placed in low memory to work properly. This requirement is described in chapter 4b) and 5) in Linux documentation (Documentation/arm/booting.rst). There is an issue on arm32 with 2GB of memory that bootm_size is bigger than Linux lowmem (for example with VMSPLIT_3G). That's why limit bootm size on these systems not to be above 768MB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
ca0f6165 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Check return value from variable setup env_set..() can failed that's why check return status and report it back to make sure that user is aware that's something went wrong. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
653809f4 |
|
11-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Get rid of initrd_high variable setup When bootm_low/bootm_size are setup properly there is no need to setup any initrd_high address. Location for initrd is determined through LMB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9fea3b18 |
|
02-Aug-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Change logic around zynq_board_read_rom_ethaddr() There is no reason to build private function when CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET is not defined. There is already weak function which handles default case properly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
c8da6513 |
|
09-Jul-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Setup bootm variables On system with PL DDR which is placed before PS DDR in DT env_get_bootm_size() and env_get_bootm_low() without specifying bootm_low and bootm_size variables are taking by default gd->bd->bi_dram[0].start and gd->bd->bi_dram[0].size. As you see 0 means bank 0 which doesn't need to be PS ddr and even can be memory above 39bit VA which is what U-Boot supports now. That's why setup bootm variables based on ram_base/ram_size setting to make sure that boot images are placed to the same location as U-Boot is placed. This location should be by default location where OS can boot from. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
09140113 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
command: Remove the cmd_tbl_t typedef We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
a29511ee |
|
08-Apr-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move initrd_high setup to common location Moving to common location initrd_high is also setup for Zynq which hasn't done in run time code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
80fdef12 |
|
30-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Introduce board_late_init_xilinx() This function should keep common shared late configurations for Xilinx SoCs. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
453bb77d |
|
19-Mar-2020 |
Michal Simek <michal.simek@xilinx.com> |
arm64: xilinx: Never touch DDR if system has no DDR If DDR is not mapped do not touch it. Default XILINX_OF_BOARD_DTB_ADDR is pointing to DDR. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
14ca9f7f |
|
27-Jan-2020 |
Simon Glass <sjg@chromium.org> |
dm: core: Rename ofnode_get_chosen_prop() This function is actually intended to read a string rather than a property. All of its current callers use it that way. Also there is no way to return the length of the property from this function. Rename it to better indicate its purpose, using ofnode_read as the prefix since this matches most other functions. Also add some tests which are missing for these functions. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fc274a59 |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Add support for OF_SEPARATE with board DTB OF_BOARD and OF_SEPARATE can use board specific board_fdt_blob_setup(). OF_BOARD option is mostly used for picking up DTB from certain location. OF_SEPARATE option is used when DTB is appended after u-boot binary. This board specific function is aligned with current version in lib/fdtdec.c with checking CONFIG_XILINX_OF_BOARD_DTB_ADDR address first. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
db5b253f |
|
19-Dec-2019 |
Michal Simek <michal.simek@xilinx.com> |
arm64: zynqmp: Rename fw_dtb variable to fdt_blob The reason for this change is just get in sync with board_fdt_blob_setup() available at lib/fdtdec.c. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
f4e7e611 |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: xilinx: Enable generic of_board_dtb Modify the configuration naming to be generic to xilinx rather than specific to Versal. The offset value is different for Zynq and ZynqMP to avoid overlapping with FSBL. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
fec657be |
|
02-Oct-2019 |
Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> |
arm64: versal: Move common board dtb search Move the exisiting function of getting board dtb from versal to a common Xilinx folder. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
027b1134 |
|
22-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Remove !DM_i2C code for reading mac from eeprom All platforms are converted to DM_I2C that's why there is no reason to keep this code here. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> |
#
829e8c73 |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: common: Add support for DM_I2C zynq_board_read_rom_ethaddr() It is much easier to point to eeprom which stores information like MAC address directly via DT. eeprom which contains this information is pointed by /chosen/xlnx,eeprom parameter. For example: chosen { bootargs = "earlycon"; stdout-path = "serial0:115200n8"; + xlnx,eeprom = &eeprom; }; Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
#
9755e3db |
|
21-Jan-2019 |
Michal Simek <michal.simek@xilinx.com> |
xilinx: Move zynq_board_read_rom_ethaddr to shared location Zynq and ZynqMP are sharing similar code and there is no reason to do code duplication. Move zynq_board_read_rom_ethaddr() to common file for easier conversion to DM. Use ZynqMP version that's why also add CONFIG_ZYNQ_EEPROM_BUS to Syzygy which is only one Zynq board which is using this feature. Signed-off-by: Michal Simek <michal.simek@xilinx.com> |