#
e1233791 |
|
21-Jan-2024 |
Marek Vasut <marek.vasut+renesas@mailbox.org> |
ARM: renesas: Drop include common.h The header file is not necessary in either of those files, remove it as common.h is going away. Include missing asm/arch/rmobile.h in board/renesas/rcar-common/v3-common.c to prevent build failure of r8a77970_eagle r8a779a0_falcon r8a77980_v3hsk and r8a77970_v3msk . Include missing asm/u-boot.h in falcon.c and grpeach.c to fix build failure due to missing definition of struct bd_info . Include errno.h in grpeach.c to fix build error due to missing definition of EINVAL. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> |
#
35b65dd8 |
|
15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marex@denx.de> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
#
35b65dd8 |
|
15-Dec-2020 |
Harald Seiler <hws@denx.de> |
reset: Remove addr parameter from reset_cpu() Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
cd93d625 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/bitops.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
691d719d |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop init.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
4d72caa5 |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop image.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
657afb14 |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
9a3b4ceb |
|
28-Dec-2019 |
Simon Glass <sjg@chromium.org> |
common: Move reset_cpu() to the CPU header Move this function out of common.h and into a relevant header file. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
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02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
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02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
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02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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#
5602330d |
|
02-Oct-2018 |
Marek Vasut <marek.vasut+renesas@gmail.com> |
ARM: rmobile: Add recovery SPL for R-Car Gen3 Build an SPL which can be started via SCIF download mode on R-Car Gen3 and allows loading and executing U-Boot uImage with the next stage code. This is also useful for starting e.g. ATF BL2, which inits the hardware and returns to the U-Boot SPL, which can then load e.g. U-Boot proper. The H3, M3-W, M3-N SoCs have plenty of SRAM for storing the U-Boot SPL while the payload, e.g. ATF BL2, executes, so there is no problem here. However, E3 and D3 have much less SRAM, hence the loader uses a trick where it copies itself beyond the area used by BL2 and executes from there. That area is 32kiB large and not enough to hold U-Boot SPL, BSS, stack and malloc area, so the later two are placed at +0x4000 offset from start of SRAM, another area not used by ATF BL2. To make things even more complicated, the SCIF loader cannot load to the upper 32kiB of the SRAM directly, hence the copying approach. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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