#
d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b8d59ba0 |
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30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
board: freescale: Remove <common.h> and add needed includes Remove <common.h> from this board vendor directory and when needed add missing include files directly. Acked-by: Jason Liu <jason.hui.liu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2f420f13 |
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27-Nov-2022 |
Tom Rini <trini@konsulko.com> |
net: tsec: Remove non-DM_ETH support code As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Doing this removes some board support code which was also unused. Finally, this removes some CONFIG symbols that otherwise needed to be migrated to Kconfig, but were unused in code now. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
65cc0e2a |
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16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5155207a |
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28-Oct-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a34f971d |
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02-Aug-2022 |
Tom Rini <trini@konsulko.com> |
mpc8548cds: Guard old ethernet code with !DM_ETH There is some code here for the legacy non-DM_ETH case, add a guard around it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4e4bf944 |
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31-Jul-2022 |
Simon Glass <sjg@chromium.org> |
common: Drop display_options.h from common header Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
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97229af0 |
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01-Aug-2021 |
Simon Glass <sjg@chromium.org> |
pci: freescale: Drop old code Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b75d8dc5 |
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26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
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2cf431c2 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
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d15471e6 |
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27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <masahiroy@kernel.org> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
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11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
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07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
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09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
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12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
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44d73711 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
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17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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70961ba4 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
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15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
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29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
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08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
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17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
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17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
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04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
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21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
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02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
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03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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fb3143b3 |
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03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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32049b40 |
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02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
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02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
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26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
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02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
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02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
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03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
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01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
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11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
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28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
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02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
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21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
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16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
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18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
|
29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b8d59ba0 |
|
30-Apr-2024 |
Tom Rini <trini@konsulko.com> |
board: freescale: Remove <common.h> and add needed includes Remove <common.h> from this board vendor directory and when needed add missing include files directly. Acked-by: Jason Liu <jason.hui.liu@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2f420f13 |
|
27-Nov-2022 |
Tom Rini <trini@konsulko.com> |
net: tsec: Remove non-DM_ETH support code As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Doing this removes some board support code which was also unused. Finally, this removes some CONFIG symbols that otherwise needed to be migrated to Kconfig, but were unused in code now. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
65cc0e2a |
|
16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5155207a |
|
28-Oct-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a34f971d |
|
02-Aug-2022 |
Tom Rini <trini@konsulko.com> |
mpc8548cds: Guard old ethernet code with !DM_ETH There is some code here for the legacy non-DM_ETH case, add a guard around it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4e4bf944 |
|
31-Jul-2022 |
Simon Glass <sjg@chromium.org> |
common: Drop display_options.h from common header Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
97229af0 |
|
01-Aug-2021 |
Simon Glass <sjg@chromium.org> |
pci: freescale: Drop old code Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
|
27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
|
04-Mar-2018 |
Masahiro Yamada <masahiroy@kernel.org> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
|
07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
|
15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
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17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
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21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
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26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
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29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
2f420f13 |
|
27-Nov-2022 |
Tom Rini <trini@konsulko.com> |
net: tsec: Remove non-DM_ETH support code As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Doing this removes some board support code which was also unused. Finally, this removes some CONFIG symbols that otherwise needed to be migrated to Kconfig, but were unused in code now. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
65cc0e2a |
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16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
5155207a |
|
28-Oct-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a34f971d |
|
02-Aug-2022 |
Tom Rini <trini@konsulko.com> |
mpc8548cds: Guard old ethernet code with !DM_ETH There is some code here for the legacy non-DM_ETH case, add a guard around it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4e4bf944 |
|
31-Jul-2022 |
Simon Glass <sjg@chromium.org> |
common: Drop display_options.h from common header Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
97229af0 |
|
01-Aug-2021 |
Simon Glass <sjg@chromium.org> |
pci: freescale: Drop old code Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
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27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
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07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
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17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
|
21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
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26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
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02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
|
29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5155207a |
|
28-Oct-2022 |
Tom Rini <trini@konsulko.com> |
global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a34f971d |
|
02-Aug-2022 |
Tom Rini <trini@konsulko.com> |
mpc8548cds: Guard old ethernet code with !DM_ETH There is some code here for the legacy non-DM_ETH case, add a guard around it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4e4bf944 |
|
31-Jul-2022 |
Simon Glass <sjg@chromium.org> |
common: Drop display_options.h from common header Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
97229af0 |
|
01-Aug-2021 |
Simon Glass <sjg@chromium.org> |
pci: freescale: Drop old code Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
|
27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
|
04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
|
30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
|
07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
|
15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
|
17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
|
21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
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26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
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03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
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28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
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21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
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16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
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18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
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09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
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09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
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07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
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04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
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29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a34f971d |
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02-Aug-2022 |
Tom Rini <trini@konsulko.com> |
mpc8548cds: Guard old ethernet code with !DM_ETH There is some code here for the legacy non-DM_ETH case, add a guard around it. Cc: Priyanka Jain <priyanka.jain@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
4e4bf944 |
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31-Jul-2022 |
Simon Glass <sjg@chromium.org> |
common: Drop display_options.h from common header Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
97229af0 |
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01-Aug-2021 |
Simon Glass <sjg@chromium.org> |
pci: freescale: Drop old code Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
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26-Jun-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
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27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
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11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
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07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
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17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
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15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
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08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
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21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
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02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
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03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
|
26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
|
29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
4e4bf944 |
|
31-Jul-2022 |
Simon Glass <sjg@chromium.org> |
common: Drop display_options.h from common header Move this out of the common header and include it only where needed. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
97229af0 |
|
01-Aug-2021 |
Simon Glass <sjg@chromium.org> |
pci: freescale: Drop old code Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
|
27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
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07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
|
17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
|
21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
|
26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
|
29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
97229af0 |
|
01-Aug-2021 |
Simon Glass <sjg@chromium.org> |
pci: freescale: Drop old code Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b75d8dc5 |
|
26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
|
27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
|
30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
|
07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
|
17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
|
21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
|
26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
|
29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b75d8dc5 |
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26-Jun-2020 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: convert bd_t to struct bd_info by coccinelle The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
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27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
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07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
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17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
|
21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
|
26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
|
29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
90526e9f |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop net.h from common header Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
|
27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
|
04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
|
30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
|
07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
|
15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
|
17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
|
21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
|
26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
|
07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
|
04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
|
29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
2cf431c2 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move pci_init_board() out of common.h This function can be dropped when all boards use driver model for PCI. For now, move it into init.h with a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
2189d5f1 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
Move strtomhz() to vsprintf.h At present this function sits in its own file but it does not really justify it. There are similar string functions in vsprintf.h, so move it there. Also add the missing function comment. Use the vsprintf.h include file explicitly where needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
d15471e6 |
|
27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
|
04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
|
11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
|
30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
|
07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
|
09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
|
12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
|
15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
|
06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
|
23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
|
17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
|
17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
|
15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
|
29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
|
08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
|
17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
|
17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
|
04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
|
21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
|
02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
|
26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
|
02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
|
28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
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16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
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18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
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09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
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09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
66f5fa92 |
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07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a30a549a |
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04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
415a613b |
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29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d15471e6 |
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27-Aug-2019 |
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> |
powerpc: MPC8548CDS: Compile legacy PCIe routines conditionally Compile the legacy PCIe initialization routines only when DM_PCI is not enabled. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> |
#
1adc0954 |
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11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com> |
#
3765b3e7 |
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07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
945f4310 |
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09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
d3701228 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
fff80975 |
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12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
a6d0bfa8 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> |
#
44d73711 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b813cbe9 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f5fa8f36 |
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17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
7ea3871e |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
70961ba4 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
38dba0c2 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5d27e02c |
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15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
8ca78f2c |
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29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org |
#
6525d51f |
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08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
f51cdaf1 |
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17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
64917ca3 |
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17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net> |
#
7b626880 |
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04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b32a8940 |
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21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
3e7b6c1f |
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02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
cb151aa2 |
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03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
fb3143b3 |
|
03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
32049b40 |
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02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
c8514622 |
|
02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
b0fe93ed |
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26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
5f91ef6a |
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02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
10795f42 |
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02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com> |
#
a5d212a2 |
|
03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com> |
#
9427ccde |
|
01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
#
a2cd50ed |
|
11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
9b0ad1b1 |
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28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> |
#
3cbd8231 |
|
02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de> |
#
2dba0dea |
|
21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
e31d2c1e |
|
18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
9973e3c6 |
|
09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com> |
#
ddde74a1 |
|
09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
#
978e8160 |
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09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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66f5fa92 |
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07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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a30a549a |
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04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
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415a613b |
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29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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b08c8c48 |
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04-Mar-2018 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h> Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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1adc0954 |
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11-Jan-2016 |
Bin Meng <bmeng.cn@gmail.com> |
powerpc: mpc8548cds: Do not wrap pci_eth_init() with CONFIG_TSEC_ENET The call to pci_eth_init() should not be wrapped with CONFIG_TSEC_ENET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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5614e71b |
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30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
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3765b3e7 |
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07-Oct-2013 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup: remove trailing white space Signed-off-by: Wolfgang Denk <wd@denx.de>
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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945f4310 |
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09-Nov-2011 |
Kumar Gala <galak@kernel.crashing.org> |
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning Fix: mpc8548cds.c: In function 'local_bus_init': mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable] mpc8548cds.c: In function 'lbc_sdram_init': mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable] Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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d3701228 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix network initialization Add board_eth_init(). PCIe network card is also supported. Put RGMII init after tsec_eth_init(). Skip initializing eTSEC3 and eTSEC4 with Carrier boards prior to ver 1.3. Signed-off-by: Ebony Zhu Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
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fff80975 |
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12-Oct-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Code cleanup and refactoring - Rework tlb and law tables. - PCI2 is not available on MPC8548CDS, so remove it. - Move the memory map to the board config file. - Rewrite the board info according to the manual. - Remove unnecessary macros and redefine some macros to align with other boards. - Fix some typos. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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568336ec |
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15-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc85xxcds: Fix PCI speed The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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a6d0bfa8 |
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06-Sep-2011 |
chenhui zhao <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Fix booting message Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
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44d73711 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: Cleanup mpc8548cds.c Remove unnecessary or dead code/includes. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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b813cbe9 |
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23-Aug-2011 |
Zhao Chenhui <chenhui.zhao@freescale.com> |
powerpc/mpc8548cds: set pci1_hose.config_table after fsl_setup_hose The function fsl_setup_hose clears the variable pci1_hose. Set pci1_hose.config_table after it. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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f5fa8f36 |
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17-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Rework MPC8548CDS pci_init_board to use common FSL PCIe code Remove duplicated code in MPC8548CDS board and utilize the common fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI controllers based on which PCIe controllers are enabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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7ea3871e |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
MPC8xxx DDR: align informational prints Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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70961ba4 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx: rename sdram_init() lbc_sdram_init() sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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38dba0c2 |
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17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
mpc85xx boards: initdram() cleanup/bugfix Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
5d27e02c |
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15-Dec-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
8ca78f2c |
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29-Oct-2010 |
Peter Tyser <ptyser@xes-inc.com> |
fsl: Clean up printing of PCI boot info Previously boards used a variety of indentations, newline styles, and colon styles for the PCI information that is printed on bootup. This patch unifies the style to look like: ... NAND: 1024 MiB PCIE1: connected as Root Complex Scanning PCI bus 01 04 01 8086 1010 0200 00 04 01 8086 1010 0200 00 03 00 10b5 8112 0604 00 02 01 10b5 8518 0604 00 02 02 10b5 8518 0604 00 08 00 1957 0040 0b20 00 07 00 10b5 8518 0604 00 09 00 10b5 8112 0604 00 07 01 10b5 8518 0604 00 07 02 10b5 8518 0604 00 06 00 10b5 8518 0604 00 02 03 10b5 8518 0604 00 01 00 10b5 8518 0604 00 PCIE1: Bus 00 - 0b PCIE2: connected as Root Complex Scanning PCI bus 0d 0d 00 1957 0040 0b20 00 PCIE2: Bus 0c - 0d In: serial ... Signed-off-by: Peter Tyser <ptyser@xes-inc.com> CC: wd@denx.de CC: sr@denx.de CC: galak@kernel.crashing.org
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6525d51f |
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08-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases Previously we used an alias the pci node to determine which node to fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to find the node to update. Additionally, we replace the code in each board with a single macro call that makes assumes uniform naming and reduces duplication in this area. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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f51cdaf1 |
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17-Jun-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
83xx/85xx/86xx: LBC register cleanup Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
64917ca3 |
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17-Jan-2010 |
Peter Tyser <ptyser@xes-inc.com> |
PCIe, USB: Replace 'end point' references with 'endpoint' When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
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7b626880 |
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04-Nov-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/85xx: Clean up MPC8548 CDS PCI setup code Use new fsl_pci_init_port() that reduces amount of duplicated code in the board ports, use IO accessors and clean up printing of status info. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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865f24dc |
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02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
b32a8940 |
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21-Sep-2009 |
Peter Tyser <ptyser@xes-inc.com> |
ppc: Remove pci config table pointer relocation fixups Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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#
3e7b6c1f |
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02-Sep-2009 |
Kumar Gala <galak@kernel.crashing.org> |
ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host Refactor the code into a simple bitmask lookup table that determines if a given PCI controller is enabled and if its in host/root-complex or agent/end-point mode. Each processor in the PQ3/MPC86xx family specified different encodings for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
cb151aa2 |
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03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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fb3143b3 |
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03-Aug-2009 |
Kumar Gala <galak@kernel.crashing.org> |
pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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32049b40 |
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02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
c8514622 |
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02-Apr-2009 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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b0fe93ed |
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26-Mar-2009 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Use common LSDMR defines from asm/fsl_lbc.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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5f91ef6a |
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02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead of _IO_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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10795f42 |
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02-Dec-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead of _MEM_BASE so we are more explicit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Andy Fleming <afleming@freescale.com>
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a5d212a2 |
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03-Dec-2008 |
Trent Piepho <tpiepho@freescale.com> |
mpc8xxx: LCRR[CLKDIV] is sometimes five bits On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits instead of four. In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It should be safe as the fifth bit was defined as reserved and set to 0. Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. Signed-off-by: Trent Piepho <tpiepho@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Jon Loeliger <jdl@freescale.com>
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9427ccde |
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01-Dec-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add PORDEVSR_PCI1 define Add define used to determine if PCI1 interface is in PCI or PCIX mode. Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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a2cd50ed |
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11-Nov-2008 |
Peter Tyser <ptyser@xes-inc.com> |
85xx: Add CPU 2 errata workaround to all 8548 boards All mpc8548-based boards should implement the suggested workaround to CPU 2 errata. Without the workaround, its possible for the 8548's core to hang while executing a msync or mbar 0 instruction and a snoopable transaction from an I/O master tagged to make quick forward progress is present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Andy Fleming <afleming@freescale.com>
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9b0ad1b1 |
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28-Oct-2008 |
Dave Liu <daveliu@freescale.com> |
85xx: remove the unused ddr_enable_ecc in the board file The DDR controller of 8548/8544/8568/8572/8536 processors have the ECC data init feature, and the new DDR code is using the feature, and we don't need the way with DMA to init memory any more. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
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3cbd8231 |
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02-Nov-2008 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup, update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de>
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2dba0dea |
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21-Oct-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Convert all fsl_pci_init users to new APIs Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS, MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup(). With these changes the board code is a bit smaller and we get dma-ranges set in the device tree for these boards. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
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6d0f6bcf |
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16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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e31d2c1e |
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18-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
FSL DDR: Convert MPC8548CDS to new DDR code. Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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9973e3c6 |
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09-Jun-2008 |
Becky Bruce <becky.bruce@freescale.com> |
Change initdram() return type to phys_size_t This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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#
ddde74a1 |
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09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: remove dummy board_early_init_f A number of board ports have empty version of board_early_init_f for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
978e8160 |
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09-Jun-2008 |
Kumar Gala <galak@kernel.crashing.org> |
85xx: Remove unused and unconfigured memory test code. Remove unused and unconfigured DDR test code from FSL 85xx boards. Besides, other common code exists. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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#
66f5fa92 |
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07-May-2008 |
Andy Fleming <afleming@freescale.com> |
85xx: Limit CPU2 workaround to parts that have the errata Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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#
a30a549a |
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04-Mar-2008 |
Jon Loeliger <jdl@freescale.com> |
Remove erroneous or extra spd.h #includers. Many of the spd.h #includers don't need it, and wanted to have spd_sdram() declared instead. Since they didn't get that, some also had open coded extern declarations of it instead or as well. Fix it all up by using spd_sdram.h where needed. Signed-off-by: Jon Loeliger <jdl@freescale.com>
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#
415a613b |
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29-Nov-2007 |
Kumar Gala <galak@kernel.crashing.org> |
Move the MPC8541/MPC8555/MPC8548 CDS board under board/freescale. Minor path corrections needed to ensure buildability. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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