History log of /u-boot/board/data_modul/common/common.c
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# d678a59d 18-May-2024 Tom Rini <trini@konsulko.com>

Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>

# 7c5df518 30-Apr-2024 Tom Rini <trini@konsulko.com>

board: data_modul: Remove <common.h> and add needed includes

Remove <common.h> from this board vendor directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ac2370a8 14-Dec-2023 Tom Rini <trini@konsulko.com>

global: Remove duplicate common.h inclusions

These files include <common.h> twice. Start by removing the second
inclusion of the file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# cfdbdf78 07-Dec-2023 Marek Vasut <marex@denx.de>

ARM: imx: Update DRAM timings with inline ECC on Data Modul i.MX8M Plus eDM SBC

Import DRAM timings generated by the DDR tool 3.31 which introduce assorted
tweaks to the DRAM controller settings. Furthermore, enable DBI to improve
noise resilience of the DRAM bus by reducing the number of bit changes on
the bus.

Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors
reported by EDAC . It is not entirely clear why the slightly faster setting
does produce sporadic correctable errors, while this one does not, but this
could be related to simpler PLL setting at 3600 MTps.

Enable inline ECC which is necessary to detect ECC errors and collect
statistics by the EDAC driver in Linux. This reduces the DRAM size by
64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available
DRAM size becomes 3.5 GiB .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 5cae28c3 11-Dec-2022 Marek Vasut <marex@denx.de>

ARM: imx: Factor common code out of Data Modul i.MX8M Mini eDM SBC

Pull common.c into common subdirectory of the board file,
since this code can be reused by other Data Modul SBCs.
Drop the include of lpddr4_timing.h, which is unneeded.

Signed-off-by: Marek Vasut <marex@denx.de>

# 7c5df518 30-Apr-2024 Tom Rini <trini@konsulko.com>

board: data_modul: Remove <common.h> and add needed includes

Remove <common.h> from this board vendor directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini <trini@konsulko.com>

# ac2370a8 14-Dec-2023 Tom Rini <trini@konsulko.com>

global: Remove duplicate common.h inclusions

These files include <common.h> twice. Start by removing the second
inclusion of the file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# cfdbdf78 07-Dec-2023 Marek Vasut <marex@denx.de>

ARM: imx: Update DRAM timings with inline ECC on Data Modul i.MX8M Plus eDM SBC

Import DRAM timings generated by the DDR tool 3.31 which introduce assorted
tweaks to the DRAM controller settings. Furthermore, enable DBI to improve
noise resilience of the DRAM bus by reducing the number of bit changes on
the bus.

Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors
reported by EDAC . It is not entirely clear why the slightly faster setting
does produce sporadic correctable errors, while this one does not, but this
could be related to simpler PLL setting at 3600 MTps.

Enable inline ECC which is necessary to detect ECC errors and collect
statistics by the EDAC driver in Linux. This reduces the DRAM size by
64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available
DRAM size becomes 3.5 GiB .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 5cae28c3 11-Dec-2022 Marek Vasut <marex@denx.de>

ARM: imx: Factor common code out of Data Modul i.MX8M Mini eDM SBC

Pull common.c into common subdirectory of the board file,
since this code can be reused by other Data Modul SBCs.
Drop the include of lpddr4_timing.h, which is unneeded.

Signed-off-by: Marek Vasut <marex@denx.de>

# ac2370a8 14-Dec-2023 Tom Rini <trini@konsulko.com>

global: Remove duplicate common.h inclusions

These files include <common.h> twice. Start by removing the second
inclusion of the file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>

# cfdbdf78 07-Dec-2023 Marek Vasut <marex@denx.de>

ARM: imx: Update DRAM timings with inline ECC on Data Modul i.MX8M Plus eDM SBC

Import DRAM timings generated by the DDR tool 3.31 which introduce assorted
tweaks to the DRAM controller settings. Furthermore, enable DBI to improve
noise resilience of the DRAM bus by reducing the number of bit changes on
the bus.

Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors
reported by EDAC . It is not entirely clear why the slightly faster setting
does produce sporadic correctable errors, while this one does not, but this
could be related to simpler PLL setting at 3600 MTps.

Enable inline ECC which is necessary to detect ECC errors and collect
statistics by the EDAC driver in Linux. This reduces the DRAM size by
64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available
DRAM size becomes 3.5 GiB .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 5cae28c3 11-Dec-2022 Marek Vasut <marex@denx.de>

ARM: imx: Factor common code out of Data Modul i.MX8M Mini eDM SBC

Pull common.c into common subdirectory of the board file,
since this code can be reused by other Data Modul SBCs.
Drop the include of lpddr4_timing.h, which is unneeded.

Signed-off-by: Marek Vasut <marex@denx.de>

# cfdbdf78 07-Dec-2023 Marek Vasut <marex@denx.de>

ARM: imx: Update DRAM timings with inline ECC on Data Modul i.MX8M Plus eDM SBC

Import DRAM timings generated by the DDR tool 3.31 which introduce assorted
tweaks to the DRAM controller settings. Furthermore, enable DBI to improve
noise resilience of the DRAM bus by reducing the number of bit changes on
the bus.

Reduce the DRAM rate to 3600 MTps to remove all remaining correctable errors
reported by EDAC . It is not entirely clear why the slightly faster setting
does produce sporadic correctable errors, while this one does not, but this
could be related to simpler PLL setting at 3600 MTps.

Enable inline ECC which is necessary to detect ECC errors and collect
statistics by the EDAC driver in Linux. This reduces the DRAM size by
64 MiB for each 512 MiB of DRAM, so for a 4 GiB device the available
DRAM size becomes 3.5 GiB .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>

# 5cae28c3 11-Dec-2022 Marek Vasut <marex@denx.de>

ARM: imx: Factor common code out of Data Modul i.MX8M Mini eDM SBC

Pull common.c into common subdirectory of the board file,
since this code can be reused by other Data Modul SBCs.
Drop the include of lpddr4_timing.h, which is unneeded.

Signed-off-by: Marek Vasut <marex@denx.de>

# 5cae28c3 11-Dec-2022 Marek Vasut <marex@denx.de>

ARM: imx: Factor common code out of Data Modul i.MX8M Mini eDM SBC

Pull common.c into common subdirectory of the board file,
since this code can be reused by other Data Modul SBCs.
Drop the include of lpddr4_timing.h, which is unneeded.

Signed-off-by: Marek Vasut <marex@denx.de>