#
d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
e51478ba |
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27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd1ee5d9 |
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07-Sep-2023 |
Simon Glass <sjg@chromium.org> |
x86: broadwell: Set up MTRRs The current condition does not handle the samus_tpl case where it sets up the RAM in SPL but needs to commit the MTRRs in U-Boot proper. Add another case to handle this and update the comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
41fbb344 |
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31-Jul-2023 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change testing logic of mtrr commit On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper needs to program MTRRs too. With current testing logic of mtrr commit in init_cache_f_r(), the mtrr commit is skipped which won't work as the queued mtrr requests include setup for DRAM regions. Change the logic to allow such configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tweak to put back CONFIG_FSP_VERSION2 at top: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
70529687 |
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27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Do cache set-up by default when booting from coreboot A recent change to disable cache setup when booting from coreboot assumed that this has been done by SPL. The result is that for the coreboot board, the cache is disabled (in start.S) and never re-enabled. If the cache was turned off, as it is on boards without SPL, we should turn it back on. Add this new condition. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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70f5c99d |
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14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: coreboot: Don't setup MTRR when booting from coreboot This currently hangs and it is not necessary in any case. Drop the code when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> |
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401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
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526aabec |
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26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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67c4e9f8 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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d2860c00 |
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29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
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dbaec467 |
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03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
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7ce74b70 |
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18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
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665cb18e |
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25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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2eff9895 |
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16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
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25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
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c17ca6b5 |
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13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
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ba457562 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
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21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
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db55bd7d |
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01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
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003504b6 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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6ab6b2af |
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04-Feb-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
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17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
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86cfb6bd |
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05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
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1938f4a5 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
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f697d528 |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4b491b8d |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
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5e98947f |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b208c7f1 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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d65297b6 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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8313315b |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
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8d61625d |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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e4fb6116 |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
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50a47d05 |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
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a1d57b7a |
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23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
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d47ab0ec |
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22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
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e51478ba |
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27-Apr-2024 |
Tom Rini <trini@konsulko.com> |
x86: Remove <common.h> and add needed includes Remove <common.h> from all x86 architecture files and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
cd1ee5d9 |
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07-Sep-2023 |
Simon Glass <sjg@chromium.org> |
x86: broadwell: Set up MTRRs The current condition does not handle the samus_tpl case where it sets up the RAM in SPL but needs to commit the MTRRs in U-Boot proper. Add another case to handle this and update the comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
41fbb344 |
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31-Jul-2023 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change testing logic of mtrr commit On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper needs to program MTRRs too. With current testing logic of mtrr commit in init_cache_f_r(), the mtrr commit is skipped which won't work as the queued mtrr requests include setup for DRAM regions. Change the logic to allow such configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tweak to put back CONFIG_FSP_VERSION2 at top: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
70529687 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Do cache set-up by default when booting from coreboot A recent change to disable cache setup when booting from coreboot assumed that this has been done by SPL. The result is that for the coreboot board, the cache is disabled (in start.S) and never re-enabled. If the cache was turned off, as it is on boards without SPL, we should turn it back on. Add this new condition. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
70f5c99d |
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14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: coreboot: Don't setup MTRR when booting from coreboot This currently hangs and it is not necessary in any case. Drop the code when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
526aabec |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
67c4e9f8 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
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01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
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04-Feb-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
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17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
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05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
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1938f4a5 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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e4fb6116 |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
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50a47d05 |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
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a1d57b7a |
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23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
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d47ab0ec |
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22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
cd1ee5d9 |
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07-Sep-2023 |
Simon Glass <sjg@chromium.org> |
x86: broadwell: Set up MTRRs The current condition does not handle the samus_tpl case where it sets up the RAM in SPL but needs to commit the MTRRs in U-Boot proper. Add another case to handle this and update the comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
41fbb344 |
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31-Jul-2023 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change testing logic of mtrr commit On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper needs to program MTRRs too. With current testing logic of mtrr commit in init_cache_f_r(), the mtrr commit is skipped which won't work as the queued mtrr requests include setup for DRAM regions. Change the logic to allow such configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tweak to put back CONFIG_FSP_VERSION2 at top: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
70529687 |
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27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Do cache set-up by default when booting from coreboot A recent change to disable cache setup when booting from coreboot assumed that this has been done by SPL. The result is that for the coreboot board, the cache is disabled (in start.S) and never re-enabled. If the cache was turned off, as it is on boards without SPL, we should turn it back on. Add this new condition. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
70f5c99d |
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14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: coreboot: Don't setup MTRR when booting from coreboot This currently hangs and it is not necessary in any case. Drop the code when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> |
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401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
526aabec |
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26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
67c4e9f8 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
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29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
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03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
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18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
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25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
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25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
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13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
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21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
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01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
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04-Feb-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
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17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
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05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
|
23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
|
22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
41fbb344 |
|
31-Jul-2023 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Change testing logic of mtrr commit On Coral U-Boot SPL programs some MTRRs and FSPv2 in U-Boot proper needs to program MTRRs too. With current testing logic of mtrr commit in init_cache_f_r(), the mtrr commit is skipped which won't work as the queued mtrr requests include setup for DRAM regions. Change the logic to allow such configuration. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tweak to put back CONFIG_FSP_VERSION2 at top: Signed-off-by: Simon Glass <sjg@chromium.org> |
#
70529687 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Do cache set-up by default when booting from coreboot A recent change to disable cache setup when booting from coreboot assumed that this has been done by SPL. The result is that for the coreboot board, the cache is disabled (in start.S) and never re-enabled. If the cache was turned off, as it is on boards without SPL, we should turn it back on. Add this new condition. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
70f5c99d |
|
14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: coreboot: Don't setup MTRR when booting from coreboot This currently hangs and it is not necessary in any case. Drop the code when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
526aabec |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
67c4e9f8 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
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25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
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c17ca6b5 |
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13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
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ba457562 |
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26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
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3b621cca |
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21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
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db55bd7d |
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01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
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003504b6 |
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10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
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6ab6b2af |
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04-Feb-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
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fa790fa0 |
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17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
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86cfb6bd |
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05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
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1938f4a5 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
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f697d528 |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
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4b491b8d |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
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b208c7f1 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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d65297b6 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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8313315b |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
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8d61625d |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
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e4fb6116 |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
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23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
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d47ab0ec |
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22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
70529687 |
|
27-Jun-2021 |
Simon Glass <sjg@chromium.org> |
x86: Do cache set-up by default when booting from coreboot A recent change to disable cache setup when booting from coreboot assumed that this has been done by SPL. The result is that for the coreboot board, the cache is disabled (in start.S) and never re-enabled. If the cache was turned off, as it is on boards without SPL, we should turn it back on. Add this new condition. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
70f5c99d |
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14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: coreboot: Don't setup MTRR when booting from coreboot This currently hangs and it is not necessary in any case. Drop the code when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
526aabec |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
67c4e9f8 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
|
01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
|
05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
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23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
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22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
70f5c99d |
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14-Mar-2021 |
Simon Glass <sjg@chromium.org> |
x86: coreboot: Don't setup MTRR when booting from coreboot This currently hangs and it is not necessary in any case. Drop the code when booting from coreboot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
401d1c4f |
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30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
526aabec |
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26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
67c4e9f8 |
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14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
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25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
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03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
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18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
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25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
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25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
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01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
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05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
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11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
|
23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
|
22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
401d1c4f |
|
30-Oct-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop asm/global_data.h from common header Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> |
#
526aabec |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
67c4e9f8 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
|
01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
|
05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
|
23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
|
22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
526aabec |
|
26-Apr-2020 |
Simon Glass <sjg@chromium.org> |
x86: cpu: Skip init code when chain loading When U-Boot is not the first-stage bootloader the interrupt and cache init must be skipped, as well as init for various peripherals. Update the code to add checks for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
67c4e9f8 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
|
01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
|
05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
|
23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
|
22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
67c4e9f8 |
|
14-Nov-2019 |
Simon Glass <sjg@chromium.org> |
common: Move board_get_usable_ram_top() out of common.h Move this function into init.h which seems to be designed for this sort of thing. Also update the header to declare struct global_data so that it can be included without global_data.h being needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
cc2d27dc |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
|
01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
|
05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
|
23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
|
22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
cc2d27dc |
|
25-Sep-2019 |
Simon Glass <sjg@chromium.org> |
x86: Use mtrr_commit() with FSP2 With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init happens in TPL. Enable this, using a variable to try to make the conditions more palatable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
|
01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
|
05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
|
23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
|
22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
d2860c00 |
|
29-Aug-2019 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Drop weak version board_get_usable_ram_top() Every x86 platform provides board_get_usable_ram_top(), hence there is no need to provide a weak version board_get_usable_ram_top(), not to mention there is another weak version board_get_usable_ram_top() in common/board_f.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Aiden Park <aiden.park@intel.com> |
#
dbaec467 |
|
03-Aug-2019 |
Park, Aiden <aiden.park@intel.com> |
x86: Skip setting up MTRRs in slimbootloader The setting up MTRRs have already been done in previous Slim Bootloader stages. Signed-off-by: Aiden Park <aiden.park@intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> |
#
7ce74b70 |
|
18-Jun-2019 |
Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
x86: Revert "Don't set up MTRRs in SPL" This breaks Intel Edison to work. It gets laggish and unable to boot kernel. Reverts commit 665cb18ea64aabbeb03d27a4c92ddec1baccb87a for now till better solution will be proposed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Bin Meng <bmeng.cn@gmail.com> |
#
665cb18e |
|
25-Apr-2019 |
Simon Glass <sjg@chromium.org> |
x86: Don't set up MTRRs in SPL The MTRRs are normally set up in U-Boot proper, so avoid setting them up in SPL as well. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> |
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> |
#
db55bd7d |
|
01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> |
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com> |
#
86cfb6bd |
|
05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
1938f4a5 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> |
#
f697d528 |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
4b491b8d |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
5e98947f |
|
28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
b208c7f1 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
d65297b6 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
32f98735 |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
8313315b |
|
03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org> |
#
8d61625d |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> |
#
e4fb6116 |
|
27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de> |
#
de30122b |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
50a47d05 |
|
04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
a1d57b7a |
|
23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message |
#
d47ab0ec |
|
22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
2eff9895 |
|
16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: Use X86_32BIT_INIT instead of X86_RESET_VECTOR Use this new option to control the location of 32-bit init. This will allow us to place this in SPL if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
9b43dbfb |
|
25-Sep-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused init_helper functions Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
c17ca6b5 |
|
13-Aug-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Remove calculate_relocation_address() Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
#
ba457562 |
|
26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: spi: Convert ICH SPI driver to driver model Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
3b621cca |
|
21-Jan-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Test mtrr support flag before accessing mtrr msr On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
|
#
db55bd7d |
|
01-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Commit the current MTRRs before relocation Once we stop running from ROM we should set up the MTTRs to speed up execution. This is only needed for platforms that don't have an FSP. Also in the Coreboot case, the MTRRs are set up for us. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
003504b6 |
|
10-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove unnecessary find_fdt(), prepare_fdt() functions These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
#
6ab6b2af |
|
04-Feb-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
dts: re-write dts/Makefile more simply with Kbuild Useful rules in scripts/Makefile.lib allows us to easily generate a device tree blob and wrap it in assembly code. We do not need to parse a linker script to get output format and arch. This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
|
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
|
#
fa790fa0 |
|
17-Apr-2013 |
Simon Glass <sjg@chromium.org> |
x86: Remove legacy board init code Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Graeme Russ <graeme.russ@gmail.com>
|
#
86cfb6bd |
|
05-Mar-2013 |
Simon Glass <sjg@chromium.org> |
x86: Use sections header to obtain link symbols These are defined in asm-generic/sections.h, so remove them from architecture-specific files. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1938f4a5 |
|
11-Mar-2013 |
Simon Glass <sjg@chromium.org> |
Introduce generic pre-relocation board_f.c This file handles common pre-relocation init for boards which use the generic framework. It starts up the console, DRAM, performs relocation and then jumps to post-relocation init. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
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f697d528 |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Support relocation of FDT on start-up With CONFIG_OF_CONTROL we may have an FDT in the BSS region. Relocate it up with the rest of U-Boot to keep the rest of memory free. Signed-off-by: Simon Glass <sjg@chromium.org>
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4b491b8d |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add an __end symbol to signal the end of the U-Boot binary With this symbol we can easy append something (e.g. an FDT) to the U-Boot binary and access it from within U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
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5e98947f |
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28-Feb-2013 |
Simon Glass <sjg@chromium.org> |
x86: Add function to get top of usable ram The memory layout calculations are done in calculate_relocation_address(), and coreboot has its own version of this function. But in fact all we really need is to set the top of usable RAM, and then the base version will work as is. So instead of allowing the whole calculate_relocation_address() function to be replaced, create board_get_usable_ram_top() which can be used by a board to specify the top of the area where U-Boot relocations to. Signed-off-by: Simon Glass <sjg@chromium.org>
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b208c7f1 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Add support for CONFIG_OF_CONTROL Allow a device tree to be provided through the standard mechanisms. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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d65297b6 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Make calculate_relocation_address an overridable function Different systems may have different mechanisms for picking a suitable place to relocate U-Boot to. Signed-off-by: Gabe Black <gabeblack@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
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32f98735 |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Reorder x86's post relocation memory layout This changes the layout in decreasing addresses from: 1. Stack 2. Sections in the image 3. Heap to 1. Sections in the image 2. Heap 3. Stack This allows the stack to grow significantly more since it isn't constrained by the other u-boot areas. More importantly, the generic memory wipe code assumes that the stack is the lowest addressed area used by the main part of u-boot. In the original layout, that means that u-boot tramples all over itself. In the new layout, it works. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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8313315b |
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03-Nov-2012 |
Gabe Black <gabeblack@chromium.org> |
x86: Initialise SPI if enabled If we have SPI support, make sure that we init it. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Vic Yang <victoryang@chromium.org>
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8d61625d |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Put global data on the stack Putting global data on the stack simplifies the init process (and makes it slightly quicker). During the 'flash' stage of the init sequence, global data is in the CAR stack. After SDRAM is initialised, global data is copied from CAR to the SDRAM stack Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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e4fb6116 |
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27-Nov-2012 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Forward declare gd_t So it can be used as a type in struct global_data and remove an ugly typecast Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
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de30122b |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: move bootfile init into eth_initialize All arches init this the same way, so move the logic into the core net code to avoid duplicating it everywhere else. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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50a47d05 |
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04-Apr-2012 |
Mike Frysinger <vapier@gentoo.org> |
net: punt bd->bi_ip_addr This field gets read in one place (by "bdinfo"), and we can replace that with getenv("ipaddr"). After all, the bi_ip_addr field is kept up-to-date implicitly with the value of the ipaddr env var. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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a1d57b7a |
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23-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Convert board_init_f_r to a processing loop Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
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d47ab0ec |
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22-Dec-2011 |
Graeme Russ <graeme.russ@gmail.com> |
x86: Split init functions out of board.c This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
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